the universal property of the NAND gate and the NOR gate is discussed. The universality of the NAND gate means that it can be used as an inverter and that combinations of NAND gates can be used to implement the AND, OR, and NOR operations. Similarly, the NOR gate can be used to implement the inverter (NOT), AND, OR, and NAND operations.

The NAND Gate as a Universal Logic Element

The NAND gate is a universal gate because it can be used to produce the NOT, the AND, the OR, and the NOR functions. An inverter can be made from a NAND gate by connecting all of the inputs together and creating, in effect, a single input, as shown in Figure (a) for a 2-input gate. An AND function can be generated by the use of NAND gates alone, as shown in Figure(b). An OR function can be produced with only NAND gates, as illustrated in part (c). Finally, a NOR function is produced as shown in Figure (d).

Universal application of NAND gates.

(a) One NAND gate used as an inverter



(b) Two NAND gates used as an AND gate


(c) Three NAND gates used as an OR gate


(d) Four NAND gates used as a NOR gate

In Figure (b), a NAND gate is used to invert (complement) a NAND output to form the AND function, as indicated in the following equation:


In Figure (c), NAND gates G1 and G2 are used to invert the two input variables before they are applied to NAND gate G3. The final OR output is derived as follows by application of DeMorgan’s theorem:

In Figure (d), NAND gate  G4 is used as an inverter connected to the circuit of part (c) to produce the NOR operation A + B.

The NOR Gate as a Universal Logic Element

Like the NAND gate, the NOR gate can be used to produce the NOT, AND, OR, and NAND functions. A NOT circuit, or inverter, can be made from a NOR gate by connecting all of the inputs together to effectively create a single input, as shown in Figure 5–19(a) with a 2-input example. Also, an OR gate can be produced from NOR gates, as illustrated in Figure 5–19(b). An AND gate can be constructed by the use of NOR gates, as shown in Combinational Logic Analysis.

(a) One NOR gate used as an inverter


(b) Two NOR gates used as an OR gate

(c) Three NOR gates used as an AND gate

(d) Four NOR gates used as a NAND gate